SEMANTIC MODEL OF ARITHMETIC AND LOGICAL OPERATIONS FOR VIRTUAL HARDWARE
Keywords:
Virtualization, Hypervisor, Virtual HardwareAbstract
The objective of this project was to develop a semantic model
of arithmetic and logical operations for virtual hardware; this goal was achieved
through three main steps: Implement logic gates and arithmetic and logic units
in Nand2tetris virtual hardware simulator software; Implement recursive and
iterative functions to check the correct functioning of logical and arithmetic
operations in the p-code machine virtual machine. In the first stage,
implementations of the elementary logic gates were developed in the hardware
simulator software Nand2tetris. From these logic gates, combinational circuits
and sequential circuits were built as logical and arithmetic unit, Half Adder, Full
Adder, 16-bit Addition, 16-bit logical negation, 16-bit logical AND, 16-bit
logical OR, among others. The second stage involved experimenting at a high
level with arithmetic and logical operations, provided by the virtual machine
p-code machine, which was implemented in the C programming language, as
addition, subtraction, greater than, less than. With the logical and arithmetic
operations already implemented, iterative and recursive programs were
developed to calculate the nth value of the Fibonacci Sequence and the factorial
of any number n.
Downloads
References
BROOKSHEAR, J. G. Ciência da Computação: uma visão abrangente. Tradução Cheng Mei Lee. 7. ed. Porto Alegre: Bookman, 2005. 515 p.
CAMPOS, A. S. Modelo semântico de controle de fluxo e chamada de sub-rotina para Hardware virtual. Trabalho de Conclusão de Curso (Graduação) - Ciências da Computação, Universidade Estadual de Santa Cruz, Ilhéus,BA, 2022a.
CAMPOS, A. S. AllanaVM. 2022b. Disponível em: https://github.com/AllanaCampos/VMs. Acesso em: 06 out. 2023.
CAPUANO, F. G.; IDOETA, I. V. Elementos de eletrônica digital. 41. ed. São Paulo: Érica, c2012. 524 p.
HIALINX. O surgimento da virtualização e as grandes mudanças que ela teve. 2019. Disponível em: https://www.hialinx.com.br/post/o-surgimento-da-virtualização-e-as-grandes-mudanças-que-ela-trouxe. Acesso em: 07 out. 2022.
IBM. System/360 From Computers to Computer Systems. 2023. Disponível em: https://www.ibm.com/ibm/history/ibm100/us/en/icons/system360/. Acesso em: 07 out. 2023.
LOGIC.LY. A logic circuit simulator for Windows and macOS - logic gates, flip-flops, computer architecture, electronics, integrated circuits. 2021. Disponível em: https://logic.ly/. Acesso em: 06 out. 2023.
MICROSOFT. Azure. 2023. Disponível em: https://azure.microsoft.com/pt-br/resources/cloud-computing-dictionary/what-is-azure/. Acesso em: 07 out. 2023.
Nand2Tetris. Building a Modern Computer From First Principles. 2021. Disponível em: https://www.nand2tetris.org/. Acesso em: 06 out. 2023.
NELSON, V. et al. Digital Logic Circuit Analysis and Design. [S.l.]: Prentice Hall, 1995.
ORACLE. Oracle VM. 2021. Disponível em:
https://docs.oracle.com/en/virtualization/oracle-vm/3.4/concepts/E64081.pdf. Acesso em: 07 out. 2023.
SANTANA, I. S. S. Programa p-code que calcula o fatorial iterativo de 5. [S. l.: s. n.], 2020. Disponível em: http://cpp.sh/8xz7z. Acesso em: 7 out. 2023.
SANTANA, I. S. S. Vídeo no site youtube sobre a simulação da ULA no software Logic.ly. [S. l.: s. n.], 2021a
Disponível em: https://youtu.be/xXietuJC83o. Acesso em:
SANTANA, I. S. S. Vídeo no site youtube sobre o teste automatizado da ULA de 4 bits. Disponível em: https://youtu.be/KRKOzmZ2_fc. 2021b.
SANTANA, I. S. S. Programa p-code que calcula a Sequência de Fibonacci iterativo. [S. l.: s. n.] 2021c. Disponível em: http://cpp.sh/4lucc.
SEBESTA, R. W. Conceitos de linguagens de programação. São Paulo: Bookman, 2018.
SINGH, H. Next-Gen Virtualization for Dummies, Vmware Special Edition. New Jersey: John Wiley & Sons, Inc. 2019. 64 p.
VMWARE. VMware. 2023. Disponível em: https://www.vmware.com/. Acesso em: 07 out. 2023.
WIKIPEDIA. Máquina Virtual Java. 2023. Disponível em: https://pt.wikipedia.org/wiki/M%C3%A1quina_virtual_Java. Acesso em: 08 out. 2023.
WIRTH, N. Compiler Construction. Addison-Wesley, 1996.
ZANOELLO, T. B. Curso de introdução a criação e uso de Máquinas Virtuais. 1. ed. São Paulo: Seção Técnica de Informática – USP, 2017. 28 p.
